1. Field of the Invention
The present invention is related to a display device, data driver, and display drive method, and more particularly, to generation of data signals fed to respective pixels, from grayscale voltages which correspond to respective grayscale levels.
2. Description of the Related Art
Within a display device with a large display panel, the display panel is often driven by a plurality of data drivers. In such a display device, the display panel is divided into a plurality of regions, the number of which is identical to that of the data drivers, and the respective regions are respectively driven by the associated data drivers.
FIG. 1 is a block diagram illustrating a typical structure of a such-designed liquid crystal display device. The liquid crystal display device of FIG. 1 is provided with a liquid crystal display panel 101, a plurality of data drivers 1021 to 102N, a plurality of gate drivers 103, a grayscale generation power supply circuit 104, and a timing controller 105. The liquid crystal display panel 101 is divided into a plurality of regions 1061 to 106N, and each region 106i is connected with the associated data driver 102i.
Each data driver 102i generates data signals having voltage levels corresponding to display data received from the timing controller 105, and thereby drives signal lines (or data lines) within the associated region 106i of the liquid crystal display panel 101. The operation timing of the data drivers 102 is controlled by display timing control signals (including a polarity signal, a shift pulse, and a latch signal and so on).
The gate driver 103 drives scan lines (or gate lines) within the liquid crystal display panel 104 in response to gate driver timing control signals (including a vertical sync signal and so on).
The timing controller 105 provides display data for the data drivers 102. Additionally, the timing controller 105 provides the display timing control signals for the data drivers 102, and provides the gate driver timing control signals for the gate drivers 103, to thereby achieve timing control of the liquid crystal display device.
The grayscale generation power supply 104 feeds a set of grayscale voltage generation biases V0 to V8 to the respective data drivers 102. The grayscale voltage generation biases V0 to V8 are used to generate grayscale voltages within the respective data drivers 102, having different voltage levels from one another. Each data drive 102 generates a set of grayscale voltages associated with respective allowed grayscale levels from the grayscale voltage generation biases V0 to V8, and generates data signals through selecting the generated grayscale voltages in response to the display data. The gamma characteristics of the data drivers 102 (that is, the relation between the values of the display data fed to the data drivers 102 and the signal levels of the data signals generated by the data drivers 102) are controlled by the grayscale voltage generation biases V0 to V8.
The structure of the liquid crystal display device shown in FIG. 1, however, is not advantageous from the viewpoint of the cost. One reason is that an increased number of wire lines are necessary for providing electrical connections between the grayscale generation power supply circuit 104 and the data drivers 102, and another reason is that the grayscale generation power supply 104 is prepared separately from the data drivers 102, which undesirably increases the number of the components within the liquid crystal display device.
In order to reduce the cost, as shown in FIG. 2, a structure has been provided in which a grayscale generation power supply circuit is individually integrated in each data driver 102A (See Japanese Laid-Open Patent Application No. 2004-279482). When such structure is used, a set of grayscale voltage generation biases are generated by the grayscale generation power supply circuit 104A within each data driver 102A, and a set of grayscale voltages corresponding to respective allowed grayscale levels are generated from the grayscale voltage generation biases.
The liquid crystal display device 100A shown in FIG. 2A, however, suffers from a drawback so-called “inter-block unevenness”. The “inter-block unevenness” is a phenomenon in which the color shading of the display image on the respective regions 106 of the liquid crystal display panel 101 is different depending on the characteristics of the respective data drivers 102A.
According to an inventors' investigation, one of causes of the “inter-block unevenness” is the variations in the offset voltages of the amplifiers integrated within the grayscale generation power supply circuit 104A in the respective data drivers 102A. The offset voltages of the amplifiers integrated within the grayscale generation power supply circuit 104A are inevitably different among the data drivers. The variations in the offset voltages undesirably cause the variations of the gamma characteristics of the data drivers.
Let us consider the case, for example, when the grayscale generation power supply circuit 104A in each data driver 102A is composed of constant voltage sources 201, 202, and a pair of amplifiers 203 and 204, and the grayscale voltages V0 to V63 are generated by serially-connected resister 205 connected between the outputs of the amplifiers 203 and 204. In this case, the voltage level of a data signal fed to a specific pixel is selected from the grayscale voltages V0 to V63 in response to the display data.
The offset voltages of the amplifiers 203 and 204 within the grayscale generation power supply circuit 104A are placed into selected one of four states “State 1” to “State 4”, shown in FIGS. 4A to 4D, respectively. In FIGS. 4A to 4D, the symbols “VH*”, “VL*” indicate desired output voltages of the amplifiers 203 and 204, respectively. The “State 1” is a state in which the actual output voltage of the amplifier 203 is higher by the offset A than the desired value VH*, and the actual output voltage of the amplifier 204 is lower by the offset B than the desired value VL*. The “State 2” is a state in which the actual output voltage of the amplifier 203 is lower by the offset A than the desired value VH*, and the actual output voltage of the amplifier 204 is lower by the offset B than the desired value VL*. The “State 3” is a state in which the actual output voltage of the amplifier 203 is higher by the offset A than the desired value VH*, and the actual output voltage of the amplifier 204 is higher by the offset B than the desired value VL*. Finally, the “State 4” is a state in which the actual output voltage of the amplifier 203 is lower by the offset A than the desired value VH*, and the actual output voltage of the amplifier 204 is higher by the offset B than the desired value VL*.
The gamma characteristics of the respective data drivers 102A depend on which states the respective data drivers 102A are placed into. The states of the respective data drivers 102A are randomly determined by the manufacture variations, and this causes the variations in gamma characteristics of the respective data drivers 102A. Such situation also applies to the case when the number of amplifiers integrated within the grayscale generation power supply circuit 104A is increased.
The variations in the offset voltages of the amplifiers within the grayscale generation power supply circuits 104A cause the variations in the gamma characteristics of the respective data drivers 102A. This results in that the voltage levels of the data signals generated by the data drivers for the same display data are different among data drivers. Such variations in the gamma characteristics are recognized by the human eye as the “inter-block unevenness”. For example, the boundary between regions driven by adjacent data drivers 102A may be undesirably recognized by the human eye, when the gamma characteristics of the adjacent data drivers 102A are largely different from each other.
As thus described, the liquid crystal display device 100A shown in FIG. 2A suffers from the “inter-block unevenness”, resulting from the variations of the offset voltages of the amplifiers within the grayscale generation power supply circuits.